ED8-1

Development of Josephson Voltage Standard Systems Toward Reliability Improvement of IoT Sensors
*Michitaka Maruyama1, Chiharu Urano1, Hirotake Yamamori1, Hitoshi Sasaki1, Akira Yoshida1, Tetsuro Misawa1, Riku Inoue1, Daiki Matsumaru1, Nobu-Hisa Kaneko1

We are developing compact and user-friendly systems for Josephson voltage standard (JVS), which are useful not only for metrology institutes but also for various private fields in the IoT society. Our previous system, in which a small-size Gifford-McMahon (GM) cryocooler was installed horizontally into a 6U-high 19 inch rack, demonstrated portability of the cryogen-free programmable-JVS (PJVS) [1] system for the first time [2]. While the rack-mountable system brought us an extremely easy operation of the PJVS, it showed some drawbacks in terms of JVS-chip replacement, relatively large-size compressor, measurement dynamic range and measurement accuracy. To solve these problems, we are proceeding with research and development from various approaches, such as (a) design of new 10 K base cryocooler system, (b) fabrication of high-resolution PJVS chips, and (c) development of compressor-free cryocooler system using high-temperature-superconductor (HTS)-based JVS chips.

Regarding (a), we have developed a prototype “tower PJVS system” with a compact size of 220 mm width and 545 mm height, which is comparable to the size of commercial tower PC’s. The results of a direct comparison between the prototype with a 1 V PJVS chip and the national voltage standard system with a 10 V PJVS chip showed excellent agreement in the voltage outputs within relative expanded uncertainties of approximately 10–8.

In the approach (b), 2048 junction PJVS arrays have been newly designed and fabricated. Up to now, the generation of small dc voltage signals with a resolution of approximately 30 μV (corresponding to a single Josephson junction with the irradiated microwave frequency of 16 GHz) has been succeeded. We are now trying to improve the fabrication yield, analyzing the fabrication process. The ac voltage waveform synthesis using the PJVS chip is also considered.

Moreover, we are attempting to realize much more compact JVS systems by employing HTS-based JVS devices as the approach (c). In this approach, Josephson junctions are formed by irradiating a helium ion beam onto a Y-B-C-O thin films, and the Josephson junction array is operated in a Stirling cryocooler [3].

We believe that these approaches will lead to the realization of compact JVS systems, which will contribute to the traceability for IoT sensors and other small-signal electronic components.

M.M, C.U, H.Y, H.S, A.Y and N-H.K would thank M. Ukibe for his helpful discussions related to improving the JVS-chip fabrication and evaluation processes. M.M, C.U, H.Y and N-H.K would thank T. Sekitani, M. Taniguchi, T. Uemura, S. Tsuruta and H. Kawaguchi for their helpful discussions on this project.

This paper is based on results obtained from a project, JPNP19005, commissioned by the New Energy and Industrial Technology Development Organization (NEDO). Also, this work was partially supported by a Kakenhi Grant-in-Aid (No. JP 20H02631 and JP18H05258) from the Japan Society for the Promotion of Science (JSPS).

[1] H. Yamamori, T. Yamada, H. Sasaki, and S. Kohjiro, “NbN-based Overdamped Josephson Junctions for Quantum Voltage Standards,” IEICE Trans. Electron., Vol. E95-C, No. 3, pp. 329–336, March 2012.
[2] H. Sasaki, H. Yamamori, T. Yamada, A. Shoji, and S. Kohjiro, “Development of a Compact Josephson Voltage Standard Based on NbN/TiN/NbN Array Operating at 12K,” in Proc. Conf. on Prec. Electromagnetic Meas. (CPEM 2010), pp. 159–160, 2010.
[3] T. Misawa et. al., “Control of physical properties of YBCO thin film with helium ion microscopy,” The 82nd JSAP Autumn Meeting 2021.

Keywords: Josephson voltage standard, cryocooler system, direct comparison, PJVS