Accuracy Improvement of Polynomial Computing RSFQ Circuits Based on Stochastic Computing by Partial Duplication

Dec. 1 12:45-13:00

Moeka Tsuji1, Nobutaka Kito1
Chukyo University (Japan)1

Rapid-Single-Flux-Quantum (RSFQ) circuits are gaining attention as ultra-fast and low-power computing devices. This circuit represents logic values with voltage pulses. Each logic gate in RSFQ circuits is a clocked gate. In other words, each gate has a clock input terminal and outputs a calculation result as a presence or absence of a pulse for every clock period.

Recently, stochastic computing (SC) is attracting attention in both CMOS circuit designs and superconducting circuit designs. SC is suitable for applications tolerating small error such as neural network processing. A value in SC is represented by a ratio of 1’s in a bit-stream on a wire. Namely, in RSFQ circuits, a value in SC is represented by the number of pulses on a wire during observed clock periods. SC can realize multiplication with an AND gate. It is possible to realize a small area arithmetic circuit with SC. Though the number of clock cycles to observe increases as the calculation precision increases, duplicating an SC circuit, in other words, preparing copies of the original circuit and observing their output bit-streams, can reduce the number of clock cycles.

This presentation proposes a design method of stochastic computing circuits with improved accuracy by partial duplication. The method extends the design method of calculation circuits of polynomials in [1] to improve accuracy by duplication. Polynomials can represent many useful arithmetic functions. Though duplication can improve accuracy, naïve duplication increases circuit area largely. This method reduces the area overhead of duplication by sharing an internal part among the original and copies.

The method in [1] designs a circuit for calculating a polynomial from a transformed polynomial. The method transforms a polynomial considering available operations in SC such as multiplication with an AND gate and subtraction-from-one with a NOT gate and generates a transformed formula for designing a circuit. The transformed formula can be calculated by a circuit in which AND gates and NOT gates are connected alternately. An AND gate locates at the output of a circuit designed with the transformed formula. The proposed method duplicates only the AND gate at the output of the circuit. Duplicated units in the designed circuit share most of the original circuit.

Several circuits computing polynomials have been designed with the proposed method and evaluated by simulation. The mean absolute error of a circuit calculating the Maclaurin series of sine functions was reduced to 78% from a circuit designed with the original method in [1] with the same number of clock cycles.

[1] Koki Wada and Nobutaka Kito 2022 J. Phys.: Conf. Ser. 2323 012032.

Keywords: stochastic computing, RSFQ circuit